Nominal Frequency |
10.000MHz to 625.000MHz Some frequencies within this range may not be available. |
Frequency Tolerance/Stability |
Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency Stability over the Operating Temperature Range,
Supply Voltage Change and Output Load Change
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
|
Operating Temperature Range |
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
-40°C to +105°C
-40°C to +125°C
|
Aging at 25°C |
±2ppm Maximum First Year, ±10ppm/10 Years Maximum |
Supply Voltage |
3.3VDC ±5% |
Input Current |
30mA Maximum |
Output Voltage Logic High (VOH) |
1.425VDC Typical |
Output Voltage Logic Low (VOL) |
1.075VDC Typical |
Differential Output Error (dVod) |
50mVDC Maximum |
Differential Output Voltage (Vod) |
200mVDC Minimum, 350mVDC Typical, 454mVDC Maximum |
Offset Voltage (Vos) |
1.125V Minimum, 1.250V Typical, 1.375V Maximum |
Duty Cycle |
Measured at 50% of Waveform
50 ±10(%)
50 ±5(%)
|
Rise Time/Fall Time |
Measured at 20% to 80% of Waveform 500pSec Maximum |
Offset Error (dVos) |
50mVDC Maximum |
Load Drive Capability |
100 Ohms Between Output and Complementary Output |
Output Logic Type |
LVDS |
Phase Noise |
Click to Open Phase Noise Table |
Output Control Function |
Output Enable (OE) |
Output Control Input Voltage Logic High (Vih) |
90% of VDD Minimum or No Connect to Enable Output and Complementary Output |
Output Control Input Voltage Logic Low (Vil) |
10% of VDD Maximum to Disable Output and Complementary Output (High Impedance) |
Output Enable Time |
100nSec Maximum |
Output Disable Time |
50nSec Maximum |
Output Enable Current |
Without Load(Pin 1 = Ground) 18mA Maximum |
RMS Phase Jitter |
Click to Open RMS Phase Jitter Table |
Period Jitter (Deterministic) |
0.2pSec Typical |
Period Jitter (Random) |
2pSec Typical |
Period Jitter (RMS) |
3pSec Maximum |
Period Jitter (pk-pk) |
25pSec Maximum |
Storage Temperature Range |
-55°C to +125°C |
Start Up Time |
10mSec Maximum |