| Nominal Frequency |
2.600MHz to 200.000MHz
Some frequencies within this range may not be available. |
| Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, First Year Aging at 25°C, 260°C Reflow, Shock, and Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum |
| Aging at 25°C |
±5ppm/year Maximum |
| Operating Temperature Range |
0°C to +70°C
-40°C to +85°C |
| Supply Voltage |
3.3VDC ±5% |
| Input Current |
No Load
10mA Maximum over Nominal Frequency of 2.6MHz to 25MHz
12mA Maximum over Nominal Frequency of 25.000001MHz to 50MHz
13mA Maximum over Nominal Frequency of 50.000001MHz to 166MHz
16mA Maximum over Nominal Frequency of 166.000001MHz to 200MHz |
| Output Voltage Logic High (VOH) |
IOH= -8mA
90% of VDD Minimum |
| Output Voltage Logic Low (VOL) |
IOL= +8mA
10% of VDD Maximum |
| Duty Cycle |
Measured at 50% of Waveform
50 ±10(%)
50 ±5(%)
|
| Rise Time/Fall Time |
Measured at 20% to 80% of Waveform
6nSec Maximum from 2.6MHz to 50MHz
4nSec Maximum from 50.000001MHz to 75MHz
2nSec Maximum from 75.000001MHz to 200MHz
|
| Load Drive Capability |
30pF Maximum from 2.6MHz to 50MHz
15pF Maximum from 50.000001MHz to 200MHz |
| Output Logic Type |
CMOS |
| Pin 1 Connection |
Tri-State (High Impedance) |
| Tri-State Input Voltage (Vih and Vil) |
90% of VDD Minimum or No Connect to Enable Output
10% of VDD Maximum Disable Output (High Impedance) |
| Standby Current |
10µA Maximum (Pin 1 = Ground) |
| RMS Phase Jitter |
Fj=12kHz to 20MHz
20pSec Typical, 30pSec Maximum |
| Period Jitter (RMS) |
10pSec Typical |
| Period Jitter (pk-pk) |
60pSec Typical, 100pSec Maximum |
| Start Up Time |
10mSec Maximum |
| Storage Temperature |
-55°C to +125°C |