Nominal Frequency |
1.000MHz to 137.000MHz Some frequencies within this range may not be available. |
Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, and Output Load Change)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
|
Operating Temperature Range |
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
-40°C to +105°C
-40°C to +125°C
-55°C to +125°C
|
Supply Voltage (VDD) |
1.8VDC ±10% |
Input Current |
No Load
4.5mA Maximum over Nominal Frequency of 1MHz to 20MHz
5mA Maximum over Nominal Frequency of 20.000001MHz to 50MHz
6mA Maximum over Nominal Frequency of 50.000001MHz to 80MHz
7mA Maximum over Nominal Frequency of 80.000001MHz to 137MHz
|
Output Voltage Logic High (VOH) |
IOH = -2mA
90% of VDD Minimum
|
Output Voltage Logic Low (VOL) |
IOL = +2mA
10% of VDD Maximum
|
Duty Cycle |
Measured at 50% of waveform
50 ±10(%)
50 ±5(%)
|
Rise Time/Fall Time |
Measured at 20% to 80% of waveform
1.5nSec Typical, 3.5nSec Maximum
|
Load Drive Capability |
15pF Maximum |
Output Logic Type |
CMOS |
Output Control Function |
Tri-State (Disabled Output: High Impedance)
Power Down (Disabled Output: Logic Low) |
Output Control Input Voltage Logic High (Vih) |
70% of Vdd Minimum or No Connect to Enable Output |
Output Control Input Voltage Logic Low (Vil) |
30% of Vdd Maximum to Disable Output |
Power Down Output Enable Time |
5mSec Maximum |
Tri-State Output Enable Time |
150nSec Maximum |
Power Down Output Disable Time |
150nSec Maximum |
Tri-State Output Disable Time |
150nSec Maximum |
Standby Current |
5µA Maximum |
Period Jitter (RMS) |
2pSec Typical, 5pSec Maximum |
RMS Phase Jitter (Fj = 900kHz to 7.5MHz; Random) |
0.5pSec Typical, 1pSec Maximum |
RMS Phase Jitter (Fj = 12kHz to 20MHz; Random) |
1.5pSec Typical, 3pSec Maximum |
Aging (at 25°C) |
±1.5ppm Maximum First Year |
Start Up Time |
5mSec Maximum |
Storage Temperature Range |
-65°C to +150°C |