 |
Nominal Frequency |
1.000MHz to 106.250MHz |
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The specified reference or "center" frequency of the oscillator.
Typically specified in megahertz (MHz)or kilohertz (kHz).
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Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability
over the Operating Temperature Range, Supply Voltage Change, Output Load Change,
First Year Aging at 25°C, Shock, and Vibration.)
±100ppm Maximum (Standard)
±50ppm Maximum |
|
This "inclusive" specification is the amount of frequency deviation
from the center frequency associated with a set of operating
conditions. These conditions include: Operating Temperature Range,
Supply Voltage, and Output Load. This parameter is specified with a
maximum and minimum frequency deviation, expressed in percent (%)
or parts per million (ppm).
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|
Operating Temperature Range |
-20°C to +70°C (Standard)
-40°C to +85°C |
|
The maximum and minimum temperatures that
the oscillator device can be exposed to during oscillation. Over this
temperature range, all of the specified device operating
parameters are guaranteed.
|
|
Supply Voltage (VDD) |
3.3VDC ±0.3VDC |
|
The DC input voltage necessary for oscillator operation, specified in
volts.
|
|
Input Current |
28mA Maximum (Unloaded) |
|
The amount of current consumption by an oscillator from the power
supply, typically specified in milliamps (mA).
|
|
| Disable Current (Tri-State Option) |
16mA Maximum (Pin 1 = Ground) |
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| Standby Current (Power Down Option) |
20µA Maximum (Pin 1 = Ground) |
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Output Voltage Logic High (VOH) |
VDD-0.4VDC Minimum (IOH=-8mA) |
|
Defined as the Output Voltage Logic High or "Logic 1"
(Figure 1 in oscillator
glossary of terms).
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|
Output Voltage Logic Low (VOL) |
0.4VDC Maximum (IOL=+8mA) |
|
Defined as the Output Voltage Logic Low or "Logic 0"
(Figure 1 in oscillator
glossary of terms).
|
|
Duty Cycle |
Measured at 50% of waveform.
50 ±10(%) (Standard)
50 ±5(%) (Optional) available from 1 to 50MHz |
|
The measure of output waveform uniformity. This term, also referred
to as symmetry, is a measurement of the time that the output
waveform is in a logic high state, expressed as a percentage (%).
This parameter is measured at a specified voltage threshold or at a
percentage of the output waveform amplitude (Figure 1 in the oscillator glossary of terms).
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|
Rise Time/Fall Time |
Measured from 20% to 80% of waveform.
4nSec Maximum |
|
The Rise Time, measured in nanoseconds (nSec), is defined as the
transition time from an output logic low to an output logic high.
Conversely, the Fall Time, also measured in nanoseconds (nSec), is
defined as the transition time from an output logic high to an output
logic low. This transition time is measured at specified voltage
thresholds or at specified percentages of the output waveform
amplitude
(Figure 1 in the oscillator glossary of terms).
|
|
Load Drive Capability |
30pF HCMOS Load Maximum from 1.000MHz to 50.000MHz
15pF HCMOS Load Maximum from 50.001MHz to 106.250MHz |
|
The maximum load the oscillator can drive specified in terms of the
number of gates or the type of load circuit (Figures 2, 3 and 4 in oscillator glossary of terms).
|
|
Aging (at 25°C) |
±5ppm/year Maximum |
|
The systematic change in frequency with time due to internal changes in the crystal. Aging
is often expressed as a maximum value in parts per million per year (ppm/yr). The rate of
aging is typically greatest during the first 30 to 60 days after which time the aging rate
decreases. The following factors effect crystal aging: adsorption and desorption of
contamination on the surfaces of the quartz, stress relief of the mounting and bonding
structures, material outgassing, and seal integrity.
|
|
Storage Temperature |
-55°C to +125°C |
|
The minimum and maximum temperatures that the device can
be stored or exposed to when in a non-oscillation state. After exposing or
storing the device at the minimum or maximum temperatures for a length of
time, all of the operating specifications are guaranteed over the specified
Operating Temperature Range.
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| Output Control Function |
Tri-State Enable High or Power Down |
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| Input Voltage |
70% of VDD or greater or No Connection to enable output. 20% of VDD or less to
disable output (High Impedance State for Tri-State. Logic Low for Power Down). |
|
| Jitter |
| Absolute: |
±250pSec Maximum, ±100pSec Typical less than or equal to 33MHz
±125pSec Maximum, ±75pSec Typical above 33MHz
|
| One Sigma: |
±50pSec Maximum less than or equal to 33MHz
±40pSec Maximum greater than 33MHz |
|
|
Start Up Time |
10mSec Maximum |
|
The specified time from oscillator power-up to the time the oscillator
reaches steady state oscillation.
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